14 Tuesday May 2019
Posted in CS101
I’m returning to the full-adder logic circuit modeling to present the code for a version that tries to capture the timing of the signals.
The goal is to take a closer look at the intermediate states of the adder as signals trickle through it.
10 Friday May 2019
Posted in Fun
Lately I’ve been exploring the idea of a vector space with a large number of dimensions (but few degrees of freedom). A model was presented with five degrees of freedom in 500 dimensions (neurons, as it happens).
The question is, given the axes are bit-level, does normal vector manipulation semantics make sense. My contention is it has severe problems.
08 Wednesday May 2019
This is the third post in the Full Adder series. The first post explored ways to code the abstract model of a full-adder. The second post explored one way to code a simulation of a physical system (where the models are of the components of the system).
This post explores another gate-based model, but one with only one type of gate. This simulation is close to being transistor-level.
07 Tuesday May 2019
In the last post, I explored different ways to model the logic of a full-adder. In this post I’ll explore a model of a physical instance of a full-adder — a model that simulates physical reality.
Because a full-adder is, at root, a mathematical expression, various software models can accomplish the same results. Models are abstractions, so the only thing a model can simulate perfectly is another model.
05 Sunday May 2019
Posted in CS101
Tags
finite state machine, FSA, FSM, full adder, half adder, Python code, state engine, state table, truth table
I was involved in a debate recently about whether a full adder logic circuit is a computer. The computer science answer is: “No, not as we define a computer.”
I plan to address that answer in detail on my main blog. Here I wanted to show some of the different ways a full adder can be modeled and implemented.
The Hard-Core Coder 