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The Hard-Core Coder

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The Hard-Core Coder

Tag Archives: FSA

Full Adder Code

05 Sunday May 2019

Posted by Wyrd Smythe in CS101

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Tags

finite state machine, FSA, FSM, full adder, half adder, Python, state engine, state table, truth table

I was involved in a debate recently about whether a full adder logic circuit is a computer. The computer science answer is: “No, not as we define a computer.”

I plan to address that answer in detail on my main blog. Here I wanted to show some of the different ways a full adder can be modeled and implemented.

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Wyrd Smythe

Wyrd Smythe

The canonical fool on the hill watching the sunset and the rotation of the planet and thinking what he imagines are large thoughts.

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