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The Hard-Core Coder

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The Hard-Core Coder

Tag Archives: NOR gate

Full Adder Redux

14 Tuesday May 2019

Posted by Wyrd Smythe in CS101

≈ Leave a comment

Tags

full adder, logic circuit, modeling, NOR gate, Python code, simulation, truth table

I’m returning to the full-adder logic circuit modeling to present the code for a version that tries to capture the timing of the signals.

The goal is to take a closer look at the intermediate states of the adder as signals trickle through it.

Continue reading →

Full Adder Sim V2.0

08 Wednesday May 2019

Posted by Wyrd Smythe in CS101

≈ 1 Comment

Tags

full adder, logic circuit, modeling, NOR gate, Python code, simulation, truth table

This is the third post in the Full Adder series. The first post explored ways to code the abstract model of a full-adder. The second post explored one way to code a simulation of a physical system (where the models are of the components of the system).

This post explores another gate-based model, but one with only one type of gate. This simulation is close to being transistor-level.

Continue reading →

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Wyrd Smythe

Wyrd Smythe

The canonical fool on the hill watching the sunset and the rotation of the planet and thinking what he imagines are large thoughts.

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